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TOC Reference Bank - National Semiconductor
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ORGANIZATIONAL INFORMATION  < back
Company National Semiconductor Division Wafer Fab Division
Location Santa Clara - United States.
Company Contact   Arjun Israni
Source of Reference 

APICS Constraint Management Symposium, April 26-28 1995, Phoenix, AZ

Sales $2,500,000,000
IMPLEMENTATION INFORMATION
Name National Semiconductor
Location Santa Clara, CA United States
Industry Segment Semiconductor
Revenue $2,500,000,000
Number of employees 12,000
Implementation Date 2000
WHAT WAS DONE?  
TOC Applications TP applications
Software implemented None
RESULTS OF IMPLEMENTATION
IMPLEMENTATION RESULTS  
Revenue Increase Increased 30%
Inventory Decrease Reduced 20%
PROJECT PAYBACK  
Months to first visible results
One month
OTHER BENEFITS  
Lead times
Percent improvement 35%
Brief summary Results visible after just one month. In one year, Wafer Fab throughput gains in excess of 30%; inventory turns increased 20% and cycle time improved 35%. Has avoided procurement of many capital equipment items.